The progression from 8- and 16-bit to 32-bit architectures essentially forced the need for RISC architectures. Some examples of CISC microprocessor instruction set architectures (ISAs) include the Motorola 68000 (68K), the DEC VAX, PDP-11, several generations of the Intel x86, and 8051.Įxamples of processors with the RISC architecture include MIPS, PowerPC, Atmel’s AVR, the Microchip PIC processors, Arm processors, RISC-V, and all modern microprocessors have at least some elements of RISC. At the dawn of processors, there was no formal identification known as CISC, but the term has since been coined to identify them as different from the RISC architecture. RISC generally refers to a streamlined version of its predecessor, the Complex Instruction Set Computer (CISC). An instruction set is the entire collection of instructions for a given processor, and the term architecture implies a particular way of building the system that makes the processor. An instruction is a command given to the processor to perform an action. Speaking broadly, an ISA is a medium whereby a processor communicates with the human programmer (although there are several other formally identified layers in between the processor and the programmer).
Reduced Instruction Set Computer (RISC) is a type or category of the processor, or Instruction Set Architecture (ISA).
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